SKP ZSAVA NOP ZSAVB NOP ZEOLC NOP ZEXTA NOP ZIOAD NOP ZIOSC NOP ZTSTA NOP ZSINA NOP ZSINB NOP ZUINA NOP ZUINB NOP Z.7 OCT 7 Z.77 OCT 77 Z.177 OCT 177 SRM OCT 176777 MFLAG OCT 0 XFLAG OCT 0 ZTSH OCT 106077 ZIOM OCT 177700 Z.200 OCT 200 Z.300 OCT 300 ZH2 OCT 102000 ZH6 OCT 106000 ZH7 OCT 107000 ZCFTT DEC -1 ZTSTF DEF *+1 ASC 3,TEST ZTSTN ASC 2,XX// ZPSC ASC 6,PASS XXXXXX/ ZA.E OCT 105 ZBUFI DEF ZBUF ZBUF OCT 0 OCT 0 ZBUF1 ASC 1,XX HED DIAGNOSTIC SUBROUTINES * * SWITCH REGISTER CHECK * SWRTX NOP STA SAVS2 SAVE A-REG. LIA SR GET SWITCH REG AND B MASK OUT TEST BIT(S). SZA,RSS ANY SWITCHES UP? ISZ SWRTX NO! UPDATE RETURN TO P+2. LDA SAVS2 YES! GET ORIGINAL A-REG. JMP SWRTX,I RETURN. SPC 2 ZITCH NOP LDA ZTSH GET HALT 106077. LDB BIT1 GET ADDRESS POINTER. ZTSHL STA B,I STORE HALT IN A TRAP CELL. CPB Z.77 LAST TRAP CELL STORED? JMP ZITCH,I YES! RETURN. INB NO! UPDATE ADDR POINTER. JMP ZTSHL DO NEXT TRAP CELL. HED CONFIGURATION SECTION * CONFIGURATION SECTION * ZCONF CLC INTP,C TURN INT SYSTEM OFF CLB LDA USSC SZA,RSS IS SC SPECIFIED BY CONFIGURATOR ? STB HLT74 NO! THEN HALT 74 SZA,RSS YES! GET SC FROM USSC LIA SR GET SW. REG. CONTENTS. STB *-2 USE SR FOR ANY NEW CONFIGURATION OTB SR STA USSC SAVE IT AND Z.77 MASK AND STA USRSC SAVE SELECT CODE. LDB A CMB,INB IS ADB Z.7 SC SSB >7? JMP CONF1 YES! GO ON. EO73 HLT 73B NO! ERROR HALT. JMP ZCONF TRY AGAIN CONF1 LDA MEMO GET MEMORY MOD SIZE. AND MOMSK MASK TO MOD. IOR CFMEM MERGE IN OCTAL 6000 STA MAXMT SAVE IT. LDA USRSC GET SC BACK AGAIN. LDB IOIP INITIALIZE TEST I/O STA ZIOSC SAVE SELECT CODE STB ZIOAD SAVE TABLE ADDRESS ZIOL LDB ZIOAD,I GET ADDRESS OF LOCATION CPB M1 IS IT THE TERMINATOR JMP HLT74 YES! RETURN TO CALLER LDA B,I NO! GET CONTENTS AND ZIOM MASK OFF OLD SELECT CODE IOR ZIOSC ADD IN NEW SELECT CODE STA B,I RESTORE IT ISZ ZIOAD MOVE TO NEXT ADDRESS JMP ZIOL DO IT HLT74 RSS HLT 74B ALLOW OPERATOR TO ALTER SR. JMP ZSTEX GO TO EXEC CONTROL SECTION HED PARITY ERROR TESTS * PARITY ERROR SECTION * * SUBTEST 10.1 * TST10 EQU * NOP T10.1 JSB CHKSW CHECK SR 8 & 12. JMP TST10,I EXIT TEST CLF PERR TURN OFF PE. CCA SET STA XFLAG MESSAGE FLAG LDA RTNJP PUT RETURN JUMP STA PFCNT IN PFAR TRAP CELL. STA PECHG SET PARITY INDICATOR. LIA SR SAVE THE STA SAVSR SW.REG. DURING PF. JSB MSGC,I DEF MS100 INFORM OPERATOR TO SET UP INHLT OCT 106000 HARDWARE FOR TESTING. * * HLT 106000 INSTRUCTS THE OPERATOR TO SET THE PE * SWITCH TO THE HALT MODE,FORCE EVEN PARITY ON THE * MEMORY CONTROLLER,PFAR SWITCH TO AUTO RESTART,PRESS * RUN.. * CHKP1 OCT 5 PARITY HALT SHOULD OCCUR HERE * * IN A 2100 OR 21MX M-SERIES COMPUTER THE ABOVE DATA SHOULD * CAUSE THE COMPUTER TO HALT WITH A 5B DISPLAYED IN THE * T-REGISTER. IF COMPUTER IS 21MX E-SERIES THE T-REGISTER * VALUE WILL BE INVALID FOR THIS TEST. THE OPERATOR * MUST DETERMINE IF THE CPU HAS HALTED AT THE PROPER LOACTION * IN MEMORY. THE PARITY LAMP SHOULD BE ON. * SET THE PE SWITCH TO INT-IGNORE, PRESS PRESET, THE PARITY * LAMP (AND PARITY BIT IN 2100) SHOULD GO OUT. * PRESS RUN.. * (NOTE- NO HALT INDICATES EITHER PRESET DID NOT ENABLE PE * OR THE PE DETECTION LOGIC FAILED.) * JSB CHPAR INITIALIZE MEMORY FOR TEST. OCT 106001 * * HALT 106001 INSTRUCTS THE OPERATOR TO REMOVE THE JUMPER * FROM THE MEMORY CONTROLLER,POWER DOWN THE COMPUTER,IF 12892B * IS UNDER TEST CHANGE THE STATE OF THE SEL1,INT AND JSB * JUMPERS,POWER UP THE COMPUTER AND THE TEST WILL CONTINUE * AUTOMATICALLY. * * INSURE NO PE INTERRUPT WITH CONTROL 4 CLEAR. * PECON LDA SAVSR RESTORE THE OTA 1 SW. REGISTER. STF PERR ENABLE PARITY ERROR CCA,CLE STA TMODE SET PE TEST MODE LDA JS102 INITIALIZE TRAP CELL STA PTRAP FOR PE INTERRUPT. LDA PETD1 PETD1 CONTAINS EVEN PARITY. JMP CON12 CONTINUE TEST. ER102 JSB ERMS,I REPORT ERROR. DEF MS102 PE INT WITH CNTL 4 CLEAR. STF PERR ENABLE PARITY ERROR. CON12 LDA CPTO GET COMPUTER TYPE. CLE,SSA IS THIS A 2100? JMP MXTST NO! DO 21MX TEST. SPC 3 * * TEST ABILITY OF PE TO INTERRUPT. * ISZ PTRAP ADJUST PE TRAP CELL. STC PFCNT SET CNTL 4 FF. NOP ALLOW TIME TO INTERRUPT. CLC 0,C NO INTERRUPT! REPORT ERROR. LDA TPNT1 PUT EXPECTED LDB PX103 ADDRESS IN ERROR JSB O2AS,I MESSAGE. JSB ERMS,I REPORT ERROR. DEF MS103 NO PE INTERRUPT. * A=EXPECTED PE ADDRESS. JMP TSTNP DO NEXT TEST. ER103 LDA TPNT1 GET EXPECTED PE ADDR. STA EXPVR SAVE EXPECTED VIOLATION REG. JSB CHKIN GO CHECK INTERRUPT AND VR. JMP TSTNP DO NEXT TEST. MXTST CLA,CLE CLEAR THE STA PTRAP PE TRAP CELL. STC PFCNT ENABLE PF CONTROL. LDA GOD12 INITIALIZE PE STA PTRAP TRAP CELL. LDA TPNT2 GET EXPECTED PE ADDR. STF PERR ENABLE PARITY ERRORS. LDB PETD2 PETD2 CONTAINS BAD PARITY. NOP ALLOW TIME FOR PE TO INTERRUPT. CLC 0,C NO INTERRUPT! REPORT ERROR. LDB PX103 PUT EXPECTED PE ADDR JSB O2AS,I IN THE ERROR MESSAGE. JSB ERMS,I NO PE INTERRUPT. DEF MS103 A=EXPECTED PE ADDR. JMP NOPIN DO NEXT TEST. RET12 STA EXPVR SAVE EXPECTED VR. JSB CHKIN GO CHECK INTERRUPT. NOPIN LDA JS102 UPDATE THE INA PE STA PTRAP TRAP CELL. * * INSURE PE INTERRUPT TURNS OFF PE. * TSTNP ISZ PTRAP ADJUST PE TRAP CELL. LDA PETD3 GET BAD DATA. NO PE INTERRUPT JMP NXT12 BECAUSE LAST PE CLEARS PE INT. ER104 JSB ERMS,I REPORT ERROR IF PE INTERRUPTED. DEF MS104 PE NOT TURNED OFF BY PE INT. SKP * * INSURE STF 5 TURNS ON PE OR GOOD PARITY NOT RESTORED AFTER LDA-B * NXT12 STF PERR ENABLE PE. ISZ PTRAP ADJUST PE TRAP CELL. LDA PETD3 SHOULD GET PE FROM PETD3. JSB ERMS,I NO STF 5 OR GOOD PARITY DEF MS105 RESTORED ON LD*. ER105 STF PERR ENABLE PE. CLF PERR SHOULD TURN OFF PE. ISZ PTRAP ADJUST PE TRAP CELL. LDA PETD4 PE OFF.SHOULDN'T INTERRUPT. JMP T10.2 NO INTERRUPT. CONTINUE TESTING ER106 JSB ERMS,I REPORT ERROR. DEF MS106 CLF 5 FAILED. SKP * * SUBTEST 10.2 * * * INSURE PE DOES NOT OCCUR ON STA-B INSTRUCTION. * T10.2 LDA JS107 INITIALIZE PE STA PTRAP TRAP CELL. STF PERR ENABLE PE. STF 0 TURN ON INTP STA PETD5 NO PE ON ST* INSTRUCTION. JMP CON13 ER107 JSB ERMS,I REPORT ERROR. DEF MS107 PE ON STORE INSTRUCTION * * INSURE GOOD PARITY RESTORED AFTER * A STORE INSTRUCTION. * CON13 ISZ PTRAP ADJUST PE TRAP CELL. LDA PETD5 NO PE SHOULD OCCUR HERE. JMP T10.3 CONTINUE TESTING. ER110 JSB ERMS,I PARITY NOT RESTORED DEF MS110 AFTER STORE INSTRUCTION. SKP * * SUBTEST 10.3 * * * INSURE PE OVERRIDES MEMORY PROTECT * T10.3 CLA CLEAR STA PTRAP TRAP CELL STF PERR ENABLE PARITY ERROR. STF 0 TURN ON INTERRUPT SYSTEM. STC MPT TURN ON MPT. PEAD1 LIA 0 PE SHOULD OCCUR HERE. LIA VREG SHOULD GET PARITY ADDRESS. SSA VR15=1? JMP T10.4 YES! CONTINUE TESTING. JSB ERMS,I NO! PE DID NOT OVERRIDE MPT. DEF MS111 SKP * * SUBTEST 10.4 * * INSURE PE HOLDS OFF I/O INTERRUPTS. * T10.4 LDA CPTO GET COMPUTER TYPE. SSA,RSS IS THIS A 2100? JMP T10.5 YES! EXIT TEST. LDA PEAD2+1 INITIALIZE MPT STA MPT TRAP CELL WITH CLC 0,C INSTRUCTION STF PERR ENABLE PE. LDA JS112 INITIALIZE I-O JSB TONIO AND TRAP CELL. PEAD2 NOP PE OCCURS HERE. CLC 0,C TURN OFF INTERRUPTS. JMP T10.5 CONTINUE TESTING. ER112 JSB ERMS,I PE DID NOT HOLD DEF MS112 OFF I/O PRIORITY CHAIN. SKP * * SUBTEST 10.5 * * * INSURE NO PE OCCURS IN NON-EXISTENT MEMORY * T10.5 STF PERR ENABLE PE. LDB JS113 INITIALIZE PE STB PTRAP TRAP CELL. LDB MAXMT GET MAX MEMORY SIZE. NXMEM ADB BIT12 ADD 4K TO MEMORY. SSB REACHED 32K YET? JMP T10.6 YES! DONE WITH PE SECTION. LDA B,I GET A WORD FROM NON-EXISTENT JMP NXMEM MEMORY. NO PE SHOULD OCCUR. ER113 LDA B GET ADDRESS OF FAILURE. JSB ERMS,I REPORT ERROR. DEF MS113 PE FROM NON-EXISTENT MEMORY * A=ADDR OF NON-EXISTENT MEMORY * CAUSING THE PARITY ERROR. SKP * * SUBTEST 6 * * T10.6 JSB CHKDO GO CHECK IF REV B. JMP T10.7 EXIT TEST LDA JS301 START REV B TEST. * * THIS SECTION TESTS THE ABILITY OF THE VIOLATION REGISTER * TO CONTAIN THE PROPER INDIRECT PE ADDRESS. * STA PTRAP INITIALIZE TRAP CELL. LDA TPNT6,I FORCE INDIRECT PE. JSB ERMS,I REPORT ERROR. DEF MS301 NO INDIRECT PE. JMP T10.7 CONTINUE TEST. ER301 LDA TPNT6 EXPECTED VIOLATION ADDRESS. STA EXPVR SAVE IT. JSB CHKIN GO CHECK VIOLATION REGISTER SKP * * * SUBTEST 10.7 * * THIS SECTION VERIFIES PROPER OPERATION OF THE SEPERATE * PE VIOLATION REGISTER. * T10.7 LDA TSTD GET INITIAL ADDRESS OF TEST. STA TMODE ENABLE PE TEST MODE. STA ADMOD SET ADDRESS INCREMENT MODE. STA BUFPT SAVE IT IN POINTER. LDA JS302 INITIALIZE STA PTRAP PE TRAP CELL. PCKLP STF PERR ENABLE PARITY ERROR. LDA BUFPT,I FORCE PARITY ERROR INTERRUPT. NOP ALLOW PE TO OCCUR. CLF PERR SHUT OFF PARITY ERROR. CLE LDA BUFPT NO INTERRUPT. PUT ADDRESS LDB PX103 IN MESSAGE. JSB O2AS,I LDA BUFPT GET BAD PE ADDRESS. JSB ERMS,I REPORT ERROR. DEF MS103 NO PE INTERRUPT. * A=ADDR THAT DIDN'T CAUSE A PE. ER302 LDA BUFPT GET EXPECTED VR VALUE. STA EXPVR SAVE IT FOR CHECK. JSB CHKIN GO CHECK INTERRUPT AND VR. LDA BUFPT GET ADDRESS UNDER TEST. CPA MAXMT LAST ADDRESS? JMP CON20 YES! CONTINUE TESTING. CLB CLEAR INDICATOR. CPA B1777 ADDRESS 1777? JMP UPDAT YES! CLEAR INC INDICATOR. RETN1 LDB ADMOD NO! GET ADDR INC INDICATOR. SZB ADD OR INCREMENT ADDR? INA,RSS ADD ONE TO ADDRESS. ADA B1000 ADD 1000B TO ADDRESS. STA BUFPT SAVE UPDATED POINTER. JMP PCKLP GO TRY ANOTHER ADDRESS. CON20 JSB CHPAR RESTORE PARITY THROUGH MEMORY. JMP TST10,I EXIT TEST 10 * UPDAT STB ADMOD CLEAR ADDRESS. INA UPDATE ADDRESS. JMP RETN1 HED 12892B SPECIAL HARDWARE DIAGNOSTIC * TEST 11 * * SUBTEST 11.1 * * THIS SECTION VERIFIES THE ABILITY OF MPT TO * HOLD OFF JSB 0 AND JSB 1. * TST11 EQU * T11.1 NOP JSB CHKSW CHECK SR 8 & 12 JMP TST11,I EXIT TEST JSB CHKDO CHECK IF REV B. JMP TST11,I EXIT TEST LIA SR GET SW-REG STA SAVSR SAVE SW-REG LDA RTNJX PUT RETURN JUMP STA PFCNT IN PFAR TRAP CELL LDA XFLAG HAS THE JUMPERS BEEN SZA INSTALLED DURING TEST 10 ? JMP L1 YES! DON'T PRINT MESSAGE JSB MSGC,I NO! PRINT MESSAGE DEF MS061 HLT 61B HALT FOR OPERATOR RTNX LDA SAVSR RESTORE SW-REG OTA 1 OUTPUT TO SW-REG L1 STC PFCNT SET CNTL 4 FF CCA SET STA MFLAG MESSAGE FLAG LDB BIT2 INITIALIZE LDA JS305 MPT JSB INTMP TRAP CELL. LDB HLT31 SET UP HALT IN B. STC MPT TURN ON MPT. VAJSB JSB A VIOLATION HERE. ER305 LIA VREG GET VIOLATION REGISTER. CPA VIJSB VIOLATION AT RIGHT PLACE? JMP CON21 YES! CONTINUE NEXT TEST. JSB ERMS,I NO! REPORT ERROR. DEF MS305 ILLEGAL JSB 0 ALLOWED. CON21 LDA HLT31 INITIALIZE FOR STA 2 JSB 1 . STF 0 TURN INTERRUPT SYSTEM ON. ISZ MTRAP ADJUST MPT TRAP CELL. STC MPT TURN ON MPT. VIJS2 JSB B VIOLATION HERE ER306 LIA VREG GET VIOLATION REGISTER. CPA VIJSX WAS JSB 1 ALLOWED? JMP T11.2 NO! CONTINUE WITH NEXT TEST. JSB ERMS,I YES! REPORT ERROR. DEF MS306 ILLEGAL JSB 1 ALLOWED. SKP * SUBTEST 11.2 * * THIS SECTION INSURES ALL I/O INSTRUCTIONS * EXCEPT HALT ARE ALLOWED BY MPT. * T11.2 LDA JS307 INITIALIZE MPT CLB,CLE FENCE WILL BE 0. JSB INTMP INITIALIZE MPT. LDB VIINS GET I/O INSTRUCTION LIST POINTER STB MCNTR SAVE IT. STC MPT TURN ON MPT. IOCCK LDA MCNTR,I GET I/O INSTRUCTION CPA MIN1 END OF LIST? JMP CON22 YES! DO NEXT TEST. STA INLN2,I NO! PUT INST. IN LINE. LINE2 NOP NO VIOLATION SHOULD OCCUR ISZ MCNTR MOVE INSTRUCTION LIST PNTR. JMP IOCCK DO ANOTHER INSTRUCTION. ER307 LDA INLN2 PUT VIOLATION LDB MX53 ADDRESS IN JSB O2AS,I MESSAGE. LDB INLN2 GET VIOLATING ADDRESS LDA B,I GET VIOLATING INSTRUCTION JSB ERMS,I REPORT ERROR. DEF MS053 LEGAL INSTRUCTION CREATED MPV * A=LEGAL I-O INSTRUCTION THAT CAUSED MPT. * B=ADDRESS OF VIOLATING INSTRUCTION JMP T11.3 CON22 CLA CLEAR MPT STA MTRAP TRAP CELL. HLT 31B SHOULD NOT HALT HERE. JMP T11.3 SKP * SUBTEST 11.3 * * THIS SECTION VERIFIES THAT WHEN THE "INT" * JUMPER IS REMOVED FROM THE 12892B BOARD, * AN I-O INTERRUPT WILL OCCUR IMMEDIATELY * AFTER A STC 5 INSTRUCTION. * T11.3 LDA EXT20 INITALIZE I-O JSB TONIO TRAP CELL STC MPT TURN ON MPT. JMP *+1,I INTERRUPT IMMEDIATELY. DEF *+1 CLC 0,C TURN OFF I/O. JSB ERMS,I REPORT ERROR. DEF MS302 MPT INDIRECT LOGIC HELD OFF I/O. RET20 JMP TST11,I EXIT TEST 11 * HED TEST THAT DMA TRANSFERS ARE ALLOWED INTO PROTECTED MEMORY */ * THIS SECTION INSURES THAT DMA TRANSFERS INTO PROTECTED * MEMORY ARE ALLOWED. * TST12 EQU * NOP LDA CPTO GET OPTIONS WORD. AND BIT2 MASK TO DMA BIT. SZA,RSS IS DMA AVAILABLE? JMP TST12,I NO! GO DO NEXT TEST. LDA USRSC GET SC. IOR BIT13 MERGE CONTROL BIT OTA DMACH CONTROL WORD TO DMA LDB A INITIALIZE LDA JS313 MEMORY JSB INTMP PROTECT. CLC DMAIN OUTPUT LDA BUF CW2 TO IOR BIT15 DMA OTA DMAIN CHANNEL. STC DMAIN OUTPUT LDA MIN1 CW3 TO OTA DMAIN DMA. LDA T19 STA DMACH CLEAR DMA TRAP CELL. JSB TONIO INITIALIZE I-O. STC DMACH,C TURN ON DMA T19 STC MPT TURN ON MPT. NOP NO MEMORY PROTECT SHOULD OCCUR. HLT 31B FORCE MPT INTERRUPT. ER313 LIA VREG GET VIOLATION REGISTER. LDB A,I GET INSTRUCTION. CPB HLT31 WAS THERE A MPV DURING DMA XFER? JMP TST12,I NO! GO DO NEXT TEST. JSB ERMS,I YES! REPORT ERROR. DEF MS313 MPV DURING DMA XFER. * A=ADDRESS OF ILLEGAL VIOLATION. * B=ILLEGAL VIOLATION INSTRUCTION. JMP TST12,I HED TEST PRESET TO CLEAR MPT * * THIS SECTION TESTS THE ABILITY OF PRESET TO * CLEAR MPT. * TST13 EQU * NOP JSB CHKSW CHECK SR 8 OR 12. JMP TST13,I EXIT TEST LDA JS314 STA 2 SET TEST DATA IN 2. LDB BIT2 FENCE WILL BE 4. JSB INTMP INITIALIZE MPT. JSB MSGC,I DEF MP314 PRESS HALT,PRESET,RUN STC MPT TURN ON MPT. LDB M100 SET COUNTER. STO SET OVERFLOW NOTEF ISZ A WAIT ABOUT JMP *-1 A SECOND. SOS HAS PRESET CLEARED OVER FLOW ? JMP TST13,I YES! EXIT TEST CME FLASH E-REG. ISZ B 10 SECONDS UP? JMP NOTEF NO! WAIT SOME MORE. LDA 2 GET TEST DATA FROM 2. SZA WAS ADDR 2 STORED? JMP TST13,I YES! EXIT TEST. ER314 CLA FLASH CMA THE OTA SR SWITCH INB,SZB FOREVER. JMP *-1 JMP ER314+1 HED MESSAGES ** MESSAGES ** * HDMS OCT 6412 ASC 20,MEMORY PROTECT-PARITY ERROR DIAGNOSTIC/ MS033 ASC 17,E033 MEMORY ALTERED BY ILLEGAL STB ASC 07, INSTRUCTION/ MS034 ASC 20,E034 B-REGISTER ALTERED BY ILLEGAL LIB/ MS035 ASC 19,E035 INTERRUPT ON LIA 0 WITH MPT OFF/ MS036 ASC 17,E036 LIA NOT ALLOWED WITH MPT OFF/ MS037 ASC 20,E037 ILLEGAL DECODE OF SELECT CODE FIVE/ MS042 ASC 16,E042 I-O INTERRUPT AFTER SECOND ASC 08,LEVEL INDIRECT/ MS043 ASC 15,E043 I-O INTERRUPT AFTER FIRST ASC 08, LEVEL INDIRECT/ MS044 ASC 18,E044 NO I-O INTERRUPT ON MULTI-LEVEL ASC 05, INDIRECT/ MS046 ASC 15,E046 NO SKF ON SFS 5 AFTER MEM ASC 06, VIOLATION/ MS047 ASC 18,E047 ILLEGAL SKF ON SFC 5 AFTER MEM ASC 05,VIOLATION/ MS050 ASC 17,E050 ILLEGAL SKF ON SFS 5 WITH NO ASC 07,MEM VIOLATION/ MS051 ASC 16,E051 NO SKF ON SFC 5 WITH NO MEM ASC 06, VIOLATION/ MS052 ASC 11,E052 NO MEM VIOLATION/ MS053 ASC 20,E053 LEGAL INSTRUCTION AT ADDRESS XXXXXX MS054 ASC 15,E054 I-O TRAP CELL INSTR ERR/ OCT 6412 ASC 12,CAUSED A MPT VIOLATION/ MS100 OCT 6412 ASC 18,H100 FORCE EVEN PARITY ON THE MEMORY ASC 06, CONTROLLER OCT 6412 ASC 13,SET PE SWITCH TO HALT MODE OCT 6412 ASC 14,PFAR SWITCH TO AUTO-RESTART OCT 6412 ASC 11,PRESS PRESET(INT), RUN OCT 6412 ASC 18,CPU HALTS WITH 5 OR 106000 IN T-REG OCT 6412 ASC 07,PARITY LAMP ON OCT 6412 ASC 15,SET PARITY HALT SWITCH TO INTP OCT 6412 ASC 15,PRESS PRESET,RUN - HALT 106001 ASC 07, SHOULD OCCUR. OCT 6412 ASC 15,FOLLOW INSTRUCTION IN MOD FOR ASC 07, HALT 106001/ MS061 OCT 6412 ASC 12,H061 POWER DOWN COMPUTER OCT 6412 ASC 19, INSTALL JUMPERS PER TABLE 3-5 IN MOD OCT 6412 ASC 10, POWER UP COMPUTER/ MS062 OCT 6412 ASC 12,H062 POWER DOWN COMPUTER OCT 6412 ASC 17, SET JUMPERS TO INITIAL SETTINGS OCT 6412 ASC 11, PER TABLE 3-1 IN MOD OCT 6412 ASC 10, POWER UP COMPUTER/ MS102 ASC 15,E102 PE INT WITH CNTL 4 CLEAR/ MS103 ASC 19,E103 NO PE INTP WHEN ACCESSING ADDRESS MX103 ASC 04,XXXXXX/ MS104 ASC 17,E104 PE NOT TURNED OFF BY PE INTP/ MS105 ASC 16,E105 STF 5 DOESN'T ENABLE PE OR OCT 6412 ASC 19,LOAD INSTRUCTION RESTORED GOOD PARITY/ MS106 ASC 09,E106 CLF 5 FAILED/ MS107 ASC 15,E107 PE ON STORE INSTRUCTION/ MS110 ASC 17,E110 PARITY NOT RESTORED BY STORE ASC 06,INSTRUCTION/ MS111 ASC 15,E111 PE DID NOT OVERRIDE MPT/ MS112 ASC 19,E112 PE DID NOT BREAK PRIORITY CHAIN/ MS113 ASC 17,E113 PE FROM NON-EXISTENT MEMORY/ MS301 ASC 14,E301 NO PE INTP ON INDIRECT/ MS302 ASC 16,E302 MPT INDIRECT LOGIC HELD OFF ASC 05, I-O INTP/ MS305 ASC 10,E305 JSB 0 ALLOWED/ MS306 ASC 10,E306 JSB 1 ALLOWED/ MS313 ASC 20,E313 MPT VIOLATION DURING DCPC TRANSFER/ MP314 OCT 6412 OCT 6412 OCT 003407 BELL OCT 003407 OCT 003407 ASC 19,H314 PRESS HALT,PRESET AND RUN WITHIN ASC 05,30 SECONDS OCT 003407 OCT 003407 ASC 1,// FWAA EQU * END * ÿÿ