ASMB,A,B,L,C HED 12908 WRITEABLE CONTROL STORE DIAGNOSTIC ORG 0 * * * OPERATING INSTRUCTIONS * * * 1.LOAD AND CONFIGURE THE DIAGNOSTIC CONFIGURATOR. * * 2.LOAD DIAGNOSTIC : * A.SET P=100. * B.SET THE SWITCH REGISTER TO : * * BITS 0 THRU 5 = SELECT CODE OF WCS PCA * BITS 6 THRU 11 = RESERVED * BITS 12THRU 15 = CONTROL STORE MODULE BEING REPLACED * * NOTE-IF MACHINE IS A 2100 AND HAS FLOATING POINT OPTION * INSTALLED,CONFIGURE WCS MODULE FOR MODULE 2 OR 3. DO * NOT CONFIGURE FOR MODULE 1. IF MACHINE IS A 21MX,THEN DO * NOT CONFIGURE FOR MODULES 0,1,2,16 OR 17(OCTAL). * * C.PRESS PRESET,RUN. * D.SUCCESSFUL CONFIGURATION IS A HALT 102074. * * 3.SELECT PROGRAM OPTIONS * A.SET SWITCH REGISTER TO : * * BIT 0 = SET TO ENTER TSTMM AND TEST ALL WCS MODULES * BIT 1 = SET TO ENTER TSTSS AND PERFORM SPECIAL TESTING * BIT 2 = SET TO HALT(102050) AFTER EACH STEP,A = STEP # * BIT 3 = SET TO LOOP ON LAST STEP * BIT 4 = SET TO SHORTEN ERROR REPORTING * BIT 5 = SET TO SHORTEN ERROR REPORTING BY SKIPPING * TO THE NEXT STEP (FASTER THAN BIT 4) * BIT 6 = SET TO ENTER TSTLL AND LOOP ON MICROCODE * BIT 7 = RESERVED * BIT 8 = NOT APPLICABLE * BIT 9 = SET TO HALT(102075) AND SPECIFY TESTS IN A&B * BIT 10 = SET TO SUPPRESS NON-ERROR MESSAGE PRINTOUT * BIT 11 = SET TO SUPPRESS ERROR MESSAGE PRINTOUT * BIT 12 = SET TO LOOP ON DIAGNOSTIC. CLEAR TO HALT(102077) * AFTER EACH PASS,A = PASS # * BIT 13 = SET TO LOOP ON LAST TEST * BIT 14 = SET TO SUPPRESS ERROR HALTS * BIT 15 = SET TO HALT(102076) AFTER EACH TEST,A = TEST # * * B.PRESS PRESET,RUN. * * NOTE-RESTART FROM ADDRESS 100 TO RECONFIGURE AND RESTART. * RESTART FROM ADDRESS 2000 TO RESTART USING EXISTING * CONFIGURATION. * * SEE ROUTINES LISTINGS FOR ADDITIONAL INFORMATION. * SKP * * * SPECIAL ROUTINE INSTRUCTIONS * * * 1. TSTMM-MULTIPLE WCS TESTING * * A.SET PROGRAM OPTION BIT 0. * B.PROGRAM HALTS 102060 AFTER CURRENT PASS. * C.SET A AND B REGISTERS TO : * * A REG : * * BITS 0 THRU 5 = SELECT CODE OF NEXT HIGHER ORDER WCS PCA * BITS 6 THRU 11 = RESERVED * BITS 12THRU 15 = CONTROL STORE MODULE BEING REPLACED * * B REG : * * BITS 0 THRU 5 = SELECT CODE OF HIGHEST ORDER WCS PCA * BITS 6 THRU 11 = RESERVED * BITS 12 THRU 15 = CONTROL STORE MODULE BEING REPLACED * * OR CLEAR FOR NONEXISTENT WCS * * D.PRESS RUN. * E.PROGRAM HALTS 102074 FOR SUCCESSFUL CONFIGURATION. * F.SELECT PROGRAM OPTIONS FROM STEP 3. IN THE * OPERATING INSTRUCTIONS. * G.PRESS PRESET,RUN. * * 2.TSTSS-LOOP ON WCS I/O ROUTINE **** * * * * A.SET PROGRAM OPTION BIT 1. * * * B.PROGRAM HALTS 102063. * **** * C.SET A AND B REGISTERS TO : **** * * * * * A REG : * * * **** * BITS 0 THRU 7 = 8 MOST SIGNIFICANT BITS OF DATA WORD * BITS 8 THRU 15 = 8 BIT WCS MODULE ADDRESS * * B REG : * * BITS 0 THRU 15 = 16 LEAST SIGNIFICANT BITS OF DATA WORD * * D.PRESS PRESET,RUN. * * 3.TSTLL-LOOP ON WCS MICROCODE ROUTIN * * A.SET PROGRAM OPTION BIT 6. * * NOTE-IF MACHINE IS A 2100 AND THE WCS BOARD UNDER TEST * IS A 12908A,BE SURE BACKPLANE JUMPER ASSEMBLY,PART * NO. 12908-60005 IS CONNECTED ON THE BACKPLANE * SKP * * PROGRAM STARTING LOCATION AND DIAGNOSTIC CONFIGURATOR LINKS * ORG 100B JMP CNFIG,I C.101 EQU 101B FAST INPUT LINK C.102 EQU 102B SLOW OUTPUT LINK C.103 EQU 103B FAST OUTPUT LINK C.104 EQU 104B SLOW INPUT LINK C.105 ORG 105B FWAM = PROGRAM ENDING DEF PEND+1 ADDRESS + 1 C.106 EQU 106B LWAM C.107 EQU 107B RESERVED C.110 EQU 110B TIMER COUNTER C.111 EQU 111B FAST INPUT SELECT CODE C.112 EQU 112B SLOW OUTPUT SELECT CODE C.113 EQU 113B FAST OUTPUT SELECT CODE C.114 EQU 114B SLOW INPUT SELECT CODE C.115 EQU 115B COMPUTER TYPE AND OPTIONS C.116 EQU 116B DEVICE SELECT CODE C.117 EQU 117B MEMORY SIZE C.120 EQU 120B NOT USED C.121 EQU 121B TIMER LINK C.123 EQU 123B INTEGER TO ASCII LINK C.124 EQU 124B OCTAL TO ASCII LINK C.125 EQU 125B ASCII TO OCTAL,INTEGER LINK C.126 ORG 126B OCT 103105 DIAGNOSTIC SERIAL NUMBER C.127 EQU 127B FORMATTER LINK ORG 130B BEGIN JMP BEGIN,I DIAGNOSTIC SKP * * BASE PAGE LINKS * A EQU 0 A REGISTER B EQU 1 B REGISTER DMA EQU 6B DMA INTERRUPT ADDRESS WCS EQU 0 WCS PCA SELECT CODE IN LISTING CNFIG DEF INIT LINK TO CONFIGURATION ROUTINE BEGIN DEF START PROGRAM STARTING ADDRESS LINK PPASS DEF PM8 POINT TO PASS # IN PASS MSG JMP.1 JMP INTO,I DMA INTERRUPT INTO DEF T.104 INSTRUCTION FOR TEST1 ERADD DEF ERR3+1 CALLING ADDRESS FROM ERROR ROUT. PTAB DEF TABLE MESSAGE TABLE ADDRESS ETAB DEF ERTAB ERROR TABLE ADDRESS PP4AA DEF PM4AA LINK TO STEP # AREA OF E004 PP4 DEF MSG4 TABLE LINK TO MSG4 PP4A DEF PM4A LINK TO ADDRESS AREA OF E004 PP4B DEF PM4B LINK TO DATA READ AREA OF E004 PP4C DEF PM4C LINK TO DATA WRITTEN AREA OF E04 EP4C DEF PM4CE END OF DATA WRITTEN AREA OF E004 POCT1 DEF OCTA1 LINK TO 1ST HALF OF WORK AREA POCT2 DEF OCTA2 LINK TO 2ND HALF OF WORK AREA POCT3 DEF OCTA3 LINK TO PORTION OF WORK AREA POCT4 DEF OCTA2+1 LINK TO LAST 2 DIGITS OF # PP6A DEF PM6A LINK TO MODULE # AREA OF H030 PP6B DEF PM6B LINK TO ROUTINE AREA OF H030 PP6C DEF PM6C LINK TO STEP # AREA OF H030 BACK DEF RSTRT REPEAT PASS LINK PMSG4 DEF MS4 LINK TO MESSAGE E004 PTSTS DEF TSTSS LINK TO ROUTINE TSTSS PCNF1 DEF CONF1 LINK TO CONFIGURATION PTSTM DEF TSTMM LINK TO ROUTINE TSTMM PMRTN DEF MRTRN TSTMM RETURN POINT PP9A DEF PM9A LINK TO MACRO AREA OF H031 PP9B DEF PM9B LINK TO A AFTER AREA OF H031 PP9C DEF PM9C LINK TO EXPECTED A AREA OF H031 PP9D DEF PM9D LINK TO B AFTER AREA OF H031 PP9E DEF PM9E LINK TO EXPECTED B AREA OF H031 PP5 DEF PM5 LINK TO STEP # AREA OF E005 PP8 DEF PM8A LINK TO END OF PASS MESSAGE PP7 DEF PM7 LINK TO STEP # AREA OF E007 SRTRN DEF CONT LINK TO SKIP STEP RETURN PT. PTJMP DEF T.JMP LINK TO SKIP FOR STEP 21 MOD.2 DEF MA006 LINK TO 2100 MOD ADR 006 MOD.5 DEF MA017+2 LINK TO 2100 MOD ADR 020 PMOD2 DEF MI00B LINK TO 2100 MODIFICATION+1 MOD.3 DEF MA000+1 LINK TO 2100 MOD ADR 0(LAST 16) MODE1 DEF MA005+1 LINK TO MOD ADR 005+1 MODE3 DEF MA012+1 LINK TO 2100 MOD ADR 012 MODE4 DEF MA013 LINK TO 2100 MOD ADR 013 MODE2 DEF MA117+2 LINK TO 2100 MOD.ADR 120 PMOD1 DEF MI00A LINK TO 2100 MODIFICATION TABLE MOD.1 DEF MA000 LINK TO 2100 MOD ADR 000 MOD.6 DEF MA377 END OF 2100 MICROCODE PTSTL DEF TSTLL LINK TO ROUTINE TSTLL PMODX DEF MX00A LINK TO 21XX MICROCODE TABLE EMODX DEF X375A LINK TO 21XX END OF MODIFICATION PREMX DEF REMX LINK TO ROUTINE REMX SKP * * * DATA BUFFER POINTERS * * DBUF1 DEF *+1 ABUF1 DEF X2100 LINK TO 2100 MICROPROGRAM BUFFER DEF X2100+511 LAST WORD IN 2100 BUFFER DEF X2100+256 MIDDLE OF 2100 BUFFER DEF X2100+510 2ND TO LAST WORD IN 2100 BUFFER DBUF2 DEF *+1 BBUF1 DEF X21XX LINK TO 21XX MICROPROGRAM BUFFER DEF X21XX+511 LAST WORD IN 21XX BUFFER DEF X21XX+256 MIDDLE OF 21XX BUFFER DEF X21XX+510 2ND TO LAST WORD IN 21XX BUFFER DBUF3 DEF *+1 PBUF1 BSS 1 LINK TO DATA BUFFER PBUF2 BSS 1 LAST WORD IN DATA BUFFER PBUF3 BSS 1 MIDDLE OF DATA BUFFER PBUF4 BSS 1 2ND TO LAST WORD IN DATA BUFFER * * * STEP ADDRESS TABLE * * STAB DEF *+1 DEF STP01+1 DEF STP02+1 LAST0 DEF STP03+1 DEF STP04+1 DEF STP05+1 LAST1 DEF STP06+1 DEF STP07+1 DEF STP10+1 DEF STP11+1 DEF STP12+1 DEF STP13+1 DEF STP14+1 DEF STP15+1 LAST2 DEF STP16+1 DEF STP17+1 DEF STP20+1 DEF STP21+1 LAST3 DEF STP22+1 SKP * * * TEST SECTION TABLE * * SECTN DEF *+1 DEF TST00 DEF TST01 DEF TST02 DEF TST03 * * * I/O INSTRUCTIONS TABLE * * IOTAB DEF *+1 DEF STF1 DEF STF2 DEF STF3 DEF STF4 DEF STF5 DEF STF6 DEF OTA1 DEF OTA2 DEF OTB1 DEF STC1 DEF LIA1 DEF LIB1 DEF CLF1 DEF CLF2 DEF CLF3 IOEND DEF * * * * TEST ROUTINE TABLE * * ROUT DEF *+1 ASC 01,00 TST00 ASC 01,01 TST01 ASC 01,02 TST02 ASC 01,03 TST03 SKP * * CONSTANTS AND STORAGE * ZERO OCT 0 B1 OCT 1 B2 OCT 2 B3 OCT 3 B4 OCT 4 B5 OCT 5 .5 EQU B5 B6 OCT 6 B7 OCT 7 .8 DEC 8 .9 DEC 9 B20 OCT 20 B24 OCT 24 B25 OCT 25 B36 OCT 36 B40 OCT 40 B100 OCT 100 B140 OCT 140 B153 OCT 153 B164 OCT 164 B532 OCT 532 B533 OCT 533 B535 OCT 535 B732 OCT 732 B733 OCT 733 B2000 OCT 20000 B7771 OCT 77771 M1 OCT -1 M2 OCT -2 M3 OCT -3 M4 OCT -4 .M5 DEC -5 M10 OCT -10 M16 OCT -16 M17 OCT -17 .M16 DEC -16 M26 OCT -26 .M96 DEC -96 .M128 DEC -128 .M256 DEC -256 M400 EQU .M256 .M512 DEC -512 BIT0 EQU B1 BIT1 EQU B2 BIT2 EQU B4 BIT3 EQU .8 BIT4 EQU B20 BIT5 EQU B40 BIT6 EQU B100 BIT9 OCT 1000 BIT10 OCT 2000 BIT11 OCT 4000 BIT12 OCT 10000 BIT13 EQU B2000 BIT14 OCT 40000 BIT15 OCT 100000 MASK0 OCT 77 MASK1 OCT 204 MASK2 OCT 377 MASK3 EQU .M256 MASK4 OCT 177700 MASK5 OCT 17 MASK6 OCT 170000 MASK7 EQU M2 MASK9 OCT 3777 LTEST EQU B3 MAKES LAST TEST SECTION = 3 IADDR OCT 400 INCREMENT LEFT 8 BITS PATTA OCT 252 A & B REGISTER FOR DATA PATTB OCT 125252 101010101010101010101010 AT 0 EMOD2 EQU ZERO ONES1 OCT 777 A REGISTER FOR ALL 1'S IN LOC 1 ONES0 EQU MASK2 A REGISTER FOR ALL 1'S IN LOC 0 ONES EQU M1 = ALL 1'S ZERO1 EQU IADDR A REGISTER FOR ALL 0'S IN LOC 1 DECPT OCT 56 ASCII DECIMAL PT. SPACE EQU BIT13 ASCII SINGLE SPACE ASTRX OCT 25000 ASCII ASTERIX LHJ SP2 OCT 20040 ASCII TWO SPACES ETRAP EQU MASK0 LAST TRAP CELL ADDRESS MOD NOP CURRENT CONTROL STORE MODULE # STEP BSS 1 CURRENT STEP # SAVES BSS 1 STEP RETURN POINT SPASS BSS 1 TSTMM RETURN POINT DMAFG NOP DMA FLAG(SET IF NO DMA PRESENT) SC EQU C.116 SELECT CODE OF WCS PCA POINT BSS 1 POINTER TO PARAMETERS IN E004 CFLAG NOP E004 REPORTING FLAG TBUFF BSS 1 TEMPORARY STORAGE OF BUFFER LOC. METAB BSS 1 = -ETAB + 1 PASS BSS 1 PASS # TEST BSS 1 TEST SECTION # EFLAG NOP MESSAGE H030 FLAG MMFLG NOP CONFIGURATION FLAG FOR TSTMM MFLAG NOP SET WHEN MODULE 1 HAS BASE SET MACH1 NOP SET WHEN COMPUTER IS 2100 MACH2 NOP SET WHEN COMPUTER IS 21XX TFLAG NOP TTY FLAG(SET IF NO TTY PRESENT) ERCNT NOP ERROR COUNTER CW1 OCT 120000 STC,CLC TO WCS SELECT CODE CW2 DEF TEMPA OUTPUT DATA,ALL 0'S CW3 EQU M2 2 WORD BLOCK CW1DW EQU CW1 DMA CONTROL CW2DW EQU PBUF1 WORDS TO WRITE CW3DW EQU .M512 DATA BUFFER ON WCS JBACI JMP BACK,I PASS INSTRUCTION JBACM JMP PTSTM,I TSTMM PASS INSTRUCTION LDA1A LDA M4 LDA INSTR. FOR 2100 LDA1B LDA PP4B LOAD INSTRUCTIONS LDA1C LDA PP4C FOR ROUTINE COMP LDA1D LDA M1 LDA INSTR. FOR 21XX TRSS RSS SKIP INSTRUCTION MSJMP OCT 37500 JMP TO SECONDARY JMP TABLE JMP16 OCT 37420 JMP *+16 IN MOD2 & 3 MAC0 OCT 105000 STARTING MACRO MAC1 OCT 105021 MOD1 MACRO TO CALL TSTM1 MAC2 OCT 105141 MOD2 MACRO TO CALL TSTM1 MAC3 OCT 105261 MOD3 MACRO TO CALL TSTM1 TMAC3 BSS 1 STORAGE FOR MAC03 BMAC BSS 1 MACRO USED WHEN E008 OCCURRED THLT OCT 106077 TRAP CELL HALT SHALT OCT 106000 2ND ERROR HALT TESTS OCT 17 STANDARD TEST RUN(TST00-TST03) SECT OCT 17 STARTING & CURRENT TESTS PTEST DEF *+1 TEST OCT 3 SECTION OCT 6 STEP OCT 16 NUMBERS TEMPA NOP TEMPORARY STORAGE TEMPB NOP FOR A & B REGISTERS TEMP0 BSS 1 TEMPORARY TEMP1 BSS 1 STORAGE TEMP2 BSS 1 TEMP3 BSS 1 TEMP4 BSS 1 TEMP5 BSS 1 TEMP6 BSS 1 TEMP7 BSS 1 TEMP8 BSS 1 TEMP9 BSS 1 SAVE0 BSS 1 SAVE1 BSS 1 SAVE2 BSS 1 SAVE3 BSS 1 SAVE4 BSS 1 SAVE5 BSS 1 SAVE6 BSS 1 SAVE7 BSS 1 SAVE8 BSS 1 SAVE9 BSS 1 AREG1 BSS 1 STORAGE FOR A&B AREG2 BSS 1 REGISTERS FOR BREG1 BSS 1 USE WITH HALT BREG2 BSS 1 DISPLAYS HED SWRG * * * SWITCH REGISTER ROUTINE * * * * CALLING SEQUENCE : * * LDB MASK * JSB SWRG * * RETURNS TO P IF MASK BIT(S) SET * RETURNS TO P+1 IF MASK BIT(S) CLEAR * SWRG NOP LIA 1 GET SW REG AND B MASK BIT(S) SZA,RSS SET IN SWITCH REGISTER? ISZ SWRG NO. RETURN+1 JMP SWRG,I YES. RETURN HED WRITE,READ * * * WRITE INTO WCS VIA I/O ROUTINE * * * * WRITES ONE MICROINSTRUCTION OR DATA INTO WCS ADDRESS * SPECIFIED. * * CALLING SEQUENCE : * * LDA 1ST WORD (8 BIT ADDRESS)(8 MSB OF MICROWORD) * LDB 2ND WORD (16 LSB OF MICROWORD) * JSB WRITE * WRITE NOP STF1 STF WCS INITIALIZE DIRECTION FF OTA1 OTA WCS LOAD 1ST WORD IN WCS BUFFER OTB1 OTB WCS LOAD 2ND WORD IN WCS BUFFER STC1 STC WCS LOAD BUFFERS INTO RAM JMP WRITE,I * * * READ WCS VIA I/O ROUTINE * * * * READS WCS LOCATION INTO A & B REGISTERS * * CALLING SEQUENCE : * * LDA ADDRESS (8 BIT ADDRESS LHJ) * JSB READ * * RETURNS WITH A = 8 MSB,B = 16 LSB OF CONTENTS * READ NOP STF2 STF WCS INITIALIZE DIRECTION FF OTA2 OTA WCS LOAD ADDRESS IN WCS STF3 STF WCS RE-INITIALIZE DIRECTION FF LIA1 LIA WCS LOAD A W/8 MSB LIB1 LIB WCS LOAD B W/16 LSB JMP READ,I HED PRINT * * * MESSAGE REPORTING ROUTINE * * * * PRINTS MESSAGE ON SYSTEM SLOW OUTPUT DEVICE. * EXITS ROUTINE IF NO DEVICE PRESENT. * * CALLING SEQUENCE : * * LDA MESSAGE #(OCTAL) * JSB PRINT * PRINT NOP STA TEMP0 SAVE A LDA TFLAG CHECK FOR SZA PRESENCE OF JMP PRINT,I CONSOLE DEVICE LDA ERADD IS THIS AN CPA PRINT ERROR MESSAGE? RSS YES JMP PRIN1 NO LDB BIT11 EXIT IF JSB SWRG BIT11 JMP PRINT,I IS SET JMP PRIN2 PRIN1 EQU * LDB BIT10 EXIT IF JSB SWRG BIT 10 JMP PRINT,I IS SET PRIN2 EQU * CLA,CLE CALL LDB TEMP0 FORMATTER ADB PTAB,I TO PRINT LDB B,I MESSAGE JSB C.127,I JMP PRINT,I HED ERROR * * * ERROR ROUTINE * * * * DETERMINES ERROR BASED ON CALLING ADDRESS AND * REPORTS ERROR MESSAGE AND/OR HALTS DEPENDING * ON PROGRAM OPTIONS. * * CALLING SEQUENCE : * * EXXX JSB ERROR XXX = PROGRAM ERROR MESSAGE # * LOCATED IN ERROR TABLE.(NOT * NECESSARILY = STEP #) * ERROR NOP LDA STEP ERROR FROM CPA SAVE0 SAME STEP? JMP ERR0 YES STA SAVE0 NO JMP ERR5 CONTINUE ERR0 EQU * LDB BIT5 SHORTEN ERROR REPORTING JSB SWRG BY SKIPPING TO NEXT STEP? JSB NOERR YES LDB BIT4 NO,SHORTEN ERROR JSB SWRG REPORTING? RSS JMP ERR5 NO,CONTINUE LDA ERCNT YES,SHORTEN ERROR ADA M3 REPORTING FOR SSA THIS STEP? RSS JMP ERR6 YES ISZ ERCNT NO,INCREMENT ERROR COUNTER JMP ERR5 ERR6 EQU * JMP ERROR,I EXIT UNTIL NEXT STEP ERR5 EQU * LDA EFLAG REPORT SZA MESSAGE H030? JMP ERR4 NO LDA B6 REPORT MESSAGE H030 JSB PRINT "MODXX,TSTYY,STEP ZZ" ERR4 EQU * LDA ERROR LOOK UP LDB ETAB,I ERROR ERR1 EQU * NUMBER CPA B,I BASED ON JMP ERR2 CALLING INB ADDRESS JMP ERR1 ERR2 EQU * ADB METAB FORM MESSAGE SWP NUMBER ERR3 JSB PRINT REPORT IT LDA STEP ARE WE IN ADA M17 STEP 17-22? SSA JMP ERR7 NO LDA .9 YES,REPORT H031 JSB PRINT H031 ERR7 EQU * LDB BIT14 SUPPRESS JSB SWRG ERROR HALT? JMP ERROR,I YES,EXIT LDA HLTXX NO,FORM AND MASK4 HALT # IOR STEP FROM STA HLTXX STEP # LDA AREG1 LDB BREG1 HLTXX HLT 0 HLT XXB. XX = STEP # LDA TFLAG IS THERE A CONSOLE SZA,RSS DEVICE TO REPORT ERRORS? JMP HLTYY+1 YES,DON'T NEED 1060XX HALT LDA HLTXX NO,PREPARE AND MASK0 FOR ADDITIONAL HALT IOR SHALT STA HLTYY LDA AREG2 LOAD ADDITIONAL AND MASK2 INFORMATION LDB MOD IN A BLF,BLF AND B BLF REGISTERS IOR B LDB BREG2 HLTYY OCT 106000 HLT 1060XX. XX = STEP # CLA CLEAR STA AREG1 REPORTING STA BREG1 REGISTERS STA AREG2 STA BREG2 JMP ERROR,I HED STORE